NoC Interface Diagram

Network-on-Chip

To allow testing of a multi-core systemC model, the Network-on-Chip model is used. In the original NoC model, the processing element (PE) was simple - it randomly generated addresses and data. The MSP430 systemC model will be used to replace the PE to create a more realistic model for testing.

A network interface has to be created to connect a MSP430 to the network. Each network interface will handle creation and disassembly of packets. A packet will contain a packet header (to give information about type of packet- data, control, etc...), the destination address, and the data. Once the network interface has received these three items, it will create a packet and pass it to the network. When the network interface receives a packet, it will split it up and send it to the local MSP430.

A possible timing problem with packet creation could be solved possibly through the use of another pin that contains strobe information.

System On Chip Artwork

This artwork was created for use on my summer research poster. It was created using Microsoft Visio 2003.

CSP Assignment

Communicating Sequential Processes (CSP) is a formal method to describe concurrent process. It has many applications in embedded system and multi-processor system-on-chip. The assignment is to download and evaluate CSP related tools:

Formal Systems:
http://www.fsel.com/software.html
Download ProBE and test it. Check if FDR2 is usable and ask for academic license policy.

CSP++:
http://www.uoguelph.ca/~gardnerw/research/

Research and Debugging

Research continues on modeling at the system level. The two articles about transaction level modeling have given way to many other sources on system level modeling and verification.

Further progress has been made in debugging the SystemC model for the MSP430 core and peripherals. Sample programs are written in C code, compiled and translated into machine code, and then verified by comparing the model output to the expected output. Furthermore, the IAR Embedded Workbench tool also generates a list file containing assembly code - this is useful in debugging because I can see what instructions the core will process.

SystemC Model

The MSP430 SystemC model has been fixed to work with code generated from a C compiler called IAR Embedded Workbench. A program can be written in C code, compiled, and translated into machine code that the SystemC model can read and execute. With this step completed, I was assigned some new tasks:

• Check that simple function calls compile and run on the model. In addition, check that add, subtract, multiply, loop, etc... work on the model.
• Create a document detailing the workflow required to go from C code to machine code to running on the MSP430 SystemC model.
• Learn more about SystemC signals (see SystemC user guide)
• Read two articles on Transaction Level Modeling

System Level Diagram

Click diagram for larger view

SystemC Tasks Remaining

Still to do:

• Bus decoder - used to determine which device the CPU will be using (memory or a peripheral)
• Transactions
• Correct the timing
• Begin exploring paper topics in more depth